Topic module

1.1 Computer Architecture

Explain how processor, memory, buses, peripherals and storage cooperate, and compare architectures and devices for a stated use.

Long-form learning
Concept to Risk to Memory to Check-up

How to study WJEC GCSE Computer Science

Learn the computing principle, apply it to the named system or scenario, trace the data and control flow, and test the result against requirements.

Core concepts

Concept 1

Motherboard, PSU, CPU, GPU, expansion cards, cooling, ports, fetch-decode-execute, registers, cache, clock speed and cores

Exam cue: Identify the current WJEC unit, the command word and whether the task asks for knowledge, application or computational analysis.

Concept 2

Input and output peripherals, sensors, actuators, energy efficiency and hardware lifecycle impacts

Exam cue: Trace data, addresses and control signals through a complete fetch-decode-execute cycle before judging performance or device suitability.

Concept 3

RAM, ROM, flash, cache, virtual memory and optical, magnetic, solid-state and cloud storage trade-offs

Exam cue: Use precise terminology, trace inputs and state changes, and test the answer against the data, scenario or program behaviour.

Risk pitfalls and guardrails

Treating clock speed, core count or storage capacity as the only performance factor without considering cache, workload and other constraints.

Guardrail: Avoid generic descriptions, unchecked traces and cross-board assumptions; make every answer depend on the named data, system, algorithm or scenario.

Importing the legacy WJEC structure, a different board's content or a Foundation/Higher tier assumption.

Guardrail: Use qualification code 3460QS or 3460CS and the current two-unit untiered structure; do not import a legacy or cross-board route.

Giving a generic description without applying it to the named system, data set, algorithm or pre-release scenario.

Guardrail: Practice cannot replace the annual live brief, specified Python environment, clean-copy rule, restricted examination files or Surpass upload process.

Memory anchors

Fetch-decode-execute cycle

The processor repeatedly fetches an instruction, decodes it and executes the required operation.

Registers

Very small, fast processor locations that hold instructions, addresses, data and intermediate results.

Cache

Fast memory close to the processor that stores frequently needed instructions and data.

RAM and ROM

RAM is volatile working memory; ROM is non-volatile memory that stores fixed instructions such as firmware.

Sensor and actuator

A sensor collects input from the environment; an actuator produces a physical output.

Secondary storage trade-off

Choose a device by balancing capacity, access speed, portability, durability, reliability and cost.

Checkpoint rule

Do the check-up only after you can summarize each concept in one sentence and identify one dangerous pitfall from memory.

Knowledge Check (after reading)

Short check-up to confirm understanding of this module.

Check-up Questions

1-2 question checkpoint

During fetch, which register holds the address of the next instruction?

After an instruction is fetched, what is the processor's next stage?

Answer all questions to submit.

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