Unit 1 Computer Hardware
CPU purpose and components, fetch-execute registers, performance factors, RAM, ROM, cache, input, output and storage devices.
How to study for CCEA GCSE Digital Technology
Connect precise digital concepts to scenario evidence, design decisions, testing and evaluation, then rehearse the controlled-practice lifecycle under your centre's current CCEA instructions.
Core concepts
Concept 1
The CPU fetches, decodes and executes instructions using the control unit, ALU, immediate-access storage and named registers.
Exam cue: Trace the named register or component through the fetch-execute stage it supports.
Concept 2
Clock speed, cache size and core count can affect performance, but workload and software determine whether the benefit is realised.
Exam cue: Explain a performance factor without claiming it guarantees proportional speed.
Concept 3
Input, output and storage devices should be evaluated by capacity, speed, durability, portability, accuracy, cost and context.
Exam cue: Choose a device by the scenario's operational requirements rather than one headline specification.
Risk pitfalls and guardrails
Treating RAM as permanent storage or ROM as ordinary working memory.
Guardrail: Keep to Northern Ireland CCEA scope, never add the weights of both routes, and distinguish a digital concept from unsupported product or technology claims.
Confusing the MAR, MDR and instruction address register.
Guardrail: Keep to Northern Ireland CCEA scope, never add the weights of both routes, and distinguish a digital concept from unsupported product or technology claims.
Assuming the highest-capacity or fastest device is automatically the best choice.
Guardrail: Keep to Northern Ireland CCEA scope, never add the weights of both routes, and distinguish a digital concept from unsupported product or technology claims.
Memory anchors
CPU
The processor that fetches, decodes and executes program instructions.
ALU
The CPU component performing arithmetic and logical operations.
Control unit
The CPU component coordinating instruction execution and data flow.
RAM
Volatile working memory holding active programs and data.
ROM
Non-volatile memory storing instructions that should persist without power.
Cache
Small fast memory holding frequently needed instructions or data near the CPU.
Checkpoint rule
Do the check-up only after you can summarize each concept in one sentence and identify one dangerous pitfall from memory.
Knowledge Check (after reading)
Short check-up to confirm understanding of this module.
Check-up Questions
Which CPU stage obtains the next instruction from memory?
What happens during decode?
Answer all questions to submit.
Next step personalized recommendations
Continue learning
Move forward only after this module is stable.
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